March 10, 2012
March 7, 2012
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send ethernet packet on center button press
Stefan Schuermans authored on 2012-03-07 21:52:08
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adapt ethernet TX clock timing constraint to transmission of data on falling edge
Stefan Schuermans authored on 2012-03-07 21:18:54
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transmit data on falling edge of ethernet TX clock
Stefan Schuermans authored on 2012-03-07 21:15:19
March 6, 2012
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implemented ethernet RX packet and TX clock in testbed
Stefan Schuermans authored on 2012-03-06 20:48:33
March 5, 2012
March 4, 2012
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implemented ethernet TX interface (not tested yet)
Stefan Schuermans authored on 2012-03-04 21:38:35
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implemented ethernet RX busmaster -> packet reception working
Stefan Schuermans authored on 2012-03-03 23:42:55
March 3, 2012
March 1, 2012
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converted core to use req and grant signals to access data bus
Stefan Schuermans authored on 2012-03-01 21:23:47
February 29, 2012
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changed MIPS core to use read and write ack instead of stall input
Stefan Schuermans authored on 2012-02-29 21:28:37
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shortcut to switch between HW and simulation config
Stefan Schuermans authored on 2012-02-29 21:28:34