mips_sys

@@ -9,13 +9,13 @@ ENTITY e_mips_core IS

         clk:            IN  std_logic;

         o_instr_addr:   OUT std_logic_vector(31 DOWNTO 0);

         i_instr_data:   IN  std_logic_vector(31 DOWNTO 0);

+        o_data_req:     OUT std_logic;

+        i_data_grant:   IN  std_logic;

         o_data_addr:    OUT std_logic_vector(31 DOWNTO 0);

         i_data_rd_data: IN  std_logic_vector(31 DOWNTO 0);

         o_data_rd_en:   OUT std_logic_vector( 3 DOWNTO 0);

-        i_data_rd_ack:  IN  std_logic;

         o_data_wr_data: OUT std_logic_vector(31 DOWNTO 0);

-        o_data_wr_en:   OUT std_logic_vector( 3 DOWNTO 0);

-        i_data_wr_ack:  IN  std_logic

+        o_data_wr_en:   OUT std_logic_vector( 3 DOWNTO 0)

     );

 END ENTITY e_mips_core;

@@ -421,6 +421,10 @@ BEGIN

         END IF;

     END PROCESS p_next_pc;

+    o_data_req <= '1' WHEN (r_data_rd = data_rd_idle AND r_op = op_l)

+                           OR r_op = op_s

+                      ELSE '0';

+

     p_data_addr: PROCESS(r_op, s_val_s, r_imm_16)

         VARIABLE v_ofs: unsigned(31 DOWNTO 0);

         VARIABLE v_addr: unsigned(31 DOWNTO 0);

@@ -439,7 +443,7 @@ BEGIN

     p_data_rd_en: PROCESS(r_data_rd, r_op, r_ldst, s_data_addr)

     BEGIN

         o_data_rd_en <= "0000";

-        IF r_op = op_l THEN

+        IF r_data_rd = data_rd_idle AND r_op = op_l THEN

             CASE r_ldst IS

                 WHEN ldst_b | ldst_bu =>

                     CASE s_data_addr(1 DOWNTO 0) IS

@@ -479,7 +483,7 @@ BEGIN

     END PROCESS p_data_rd_en;

     p_data_rd: PROCESS(r_data_rd, r_op, r_ldst, s_data_addr, r_reg_t,

-                       i_data_rd_data, i_data_rd_ack, s_val_t)

+                       i_data_rd_data, i_data_grant, s_val_t)

         VARIABLE v_read: boolean;

         VARIABLE v_b:    std_logic_vector( 7 DOWNTO 0);

         VARIABLE v_h:    std_logic_vector(15 DOWNTO 0);

@@ -492,15 +496,12 @@ BEGIN

             WHEN data_rd_idle =>

                 IF r_op = op_l THEN

                     s_stall_data_rd <= '1';

+                    IF i_data_grant = '1' THEN

                         n_data_rd <= data_rd_read;

                     END IF;

+                END IF;

             WHEN data_rd_read =>

-                IF i_data_rd_ack = '0' THEN

-                    s_stall_data_rd <= '1';

-                    n_data_rd       <= data_rd_read;

-                ELSE

                 v_read := true;

-                END IF;

             WHEN OTHERS => NULL;

         END CASE;

         s_reg_wr_data_no   <= (OTHERS => '0');

@@ -568,7 +569,7 @@ BEGIN

         END IF;

     END PROCESS p_sync_data_rd;

-    p_data_wr: PROCESS(r_op, r_ldst, s_data_addr, s_val_t, i_data_wr_ack)

+    p_data_wr: PROCESS(r_op, r_ldst, s_data_addr, s_val_t, i_data_grant)

     BEGIN

         o_data_wr_data  <= (OTHERS => '0');

         o_data_wr_en    <= "0000";

@@ -638,7 +639,7 @@ BEGIN

                     END CASE;

                 WHEN OTHERS => NULL;

             END CASE;

-            IF i_data_wr_ack = '0' THEN

+            IF i_data_grant = '0' THEN

                 s_stall_data_wr <= '1';

             END IF;

         END IF;