MIPS I system running on Xilinx Spartan-3A FPGA Starter Kit: VHDL code for processor core very similar to MIPS I and for several peripherals, C firmware to run on this system

Stefan Schuermans Stefan Schuermans implement correctly writing to register file feaa63d @ 2012-01-24 21:52:18
constraints start of MIPS core: begin of decoder and ALU 2012-01-23 22:06:18
doc MIPS ISA spec 2012-01-24 21:41:27
mips implement correctly writing to register file 2012-01-24 21:52:18
.gitignore start of MIPS core: begin of decoder and ALU 2012-01-23 22:06:18
mips_sys.xise separated shifter from ALU 2012-01-24 20:43:21