MIPS I system running on Xilinx Spartan-3A FPGA Starter Kit: VHDL code for processor core very similar to MIPS I and for several peripherals, C firmware to run on this system
constraints | LED output pins | 2012-02-10 23:05:59 |
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doc | MIPS ISA spec | 2012-01-24 21:41:27 |
fw | slower LED animation for execution on FPGA | 2012-02-11 00:31:59 |
io | added "LEDs" I/O peripheral changed instruction memory from dpram to generated rom improved firmware structure to generate rom VHDL code | 2012-02-10 22:43:28 |
mips | implemented jump register instructions | 2012-02-10 22:56:14 |
system | whitespace fix | 2012-02-10 23:21:54 |
test | added "LEDs" I/O peripheral changed instruction memory from dpram to generated rom improved firmware structure to generate rom VHDL code | 2012-02-10 22:43:28 |
.gitignore | initial firmware and testbed | 2012-02-07 21:43:07 |
Default.wcfg | new wave window config for debugging | 2012-02-10 22:45:12 |
mips_sys.xise | clock and reset constraints are for whole system | 2012-02-10 23:22:30 |