mips_sys

LED output pins
Parent 999fc47
Stefan Schuermans

Stefan Schuermans commited on 2012-02-10 23:05:59
Showing 2 changed files, with 16 additions and 4 deletions.

constraints/leds.ucf
View file @ 6d168aa
... ... 
@@ -0,0 +1,8 @@
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+NET "pin_o_leds[7]" LOC = "W21" | IOSTANDARD = LVTTL | SLEW = QUIETIO | DRIVE = 4;
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+NET "pin_o_leds[6]" LOC = "Y22" | IOSTANDARD = LVTTL | SLEW = QUIETIO | DRIVE = 4;
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+NET "pin_o_leds[5]" LOC = "V20" | IOSTANDARD = LVTTL | SLEW = QUIETIO | DRIVE = 4;
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+NET "pin_o_leds[4]" LOC = "V19" | IOSTANDARD = LVTTL | SLEW = QUIETIO | DRIVE = 4;
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+NET "pin_o_leds[3]" LOC = "U19" | IOSTANDARD = LVTTL | SLEW = QUIETIO | DRIVE = 4;
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+NET "pin_o_leds[2]" LOC = "U20" | IOSTANDARD = LVTTL | SLEW = QUIETIO | DRIVE = 4;
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+NET "pin_o_leds[1]" LOC = "T19" | IOSTANDARD = LVTTL | SLEW = QUIETIO | DRIVE = 4;
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+NET "pin_o_leds[0]" LOC = "R20" | IOSTANDARD = LVTTL | SLEW = QUIETIO | DRIVE = 4;
mips_sys.xise
View file @ 6d168aa
... ... 
@@ -29,7 +29,7 @@
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     </file>
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     <file xil_pn:name="mips/core.vhd" xil_pn:type="FILE_VHDL">
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       <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="10"/>
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-      <association xil_pn:name="Implementation" xil_pn:seqID="11"/>
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+      <association xil_pn:name="Implementation" xil_pn:seqID="10"/>
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     </file>
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     <file xil_pn:name="constraints/clk.ucf" xil_pn:type="FILE_UCF">
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       <association xil_pn:name="Implementation" xil_pn:seqID="0"/>
... ... 
@@ -63,7 +63,7 @@
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     </file>
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     <file xil_pn:name="system/system.vhd" xil_pn:type="FILE_VHDL">
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       <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="13"/>
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-      <association xil_pn:name="Implementation" xil_pn:seqID="12"/>
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+      <association xil_pn:name="Implementation" xil_pn:seqID="13"/>
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     </file>
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     <file xil_pn:name="test/testbed.vhd" xil_pn:type="FILE_VHDL">
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       <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="14"/>
... ... 
@@ -73,11 +73,14 @@
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     </file>
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     <file xil_pn:name="fw/rom.vhd" xil_pn:type="FILE_VHDL">
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       <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="12"/>
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-      <association xil_pn:name="Implementation" xil_pn:seqID="140"/>
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+      <association xil_pn:name="Implementation" xil_pn:seqID="12"/>
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     </file>
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     <file xil_pn:name="io/leds.vhd" xil_pn:type="FILE_VHDL">
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       <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="11"/>
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-      <association xil_pn:name="Implementation" xil_pn:seqID="141"/>
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+      <association xil_pn:name="Implementation" xil_pn:seqID="11"/>
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+    </file>
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+    <file xil_pn:name="constraints/leds.ucf" xil_pn:type="FILE_UCF">
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+      <association xil_pn:name="Implementation" xil_pn:seqID="0"/>
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     </file>
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   </files>
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... ... 
@@ -391,6 +394,7 @@
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   <bindings>
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     <binding xil_pn:location="/e_mips_core" xil_pn:name="constraints/clk.ucf"/>
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     <binding xil_pn:location="/e_mips_core" xil_pn:name="constraints/rst.ucf"/>
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+    <binding xil_pn:location="/e_system" xil_pn:name="constraints/leds.ucf"/>
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   </bindings>
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   <libraries/>
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