April 8, 2012
March 24, 2012
March 5, 2012
March 4, 2012
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implemented ethernet RX busmaster -> packet reception working
Stefan Schuermans authored on 2012-03-03 23:42:55
March 1, 2012
February 29, 2012
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changed MIPS core to use read and write ack instead of stall input
Stefan Schuermans authored on 2012-02-29 21:28:37
February 26, 2012
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add read_enable signal to data bus and some peripherals
Stefan Schuermans authored on 2012-02-26 21:20:53
February 21, 2012
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removed bottleneck from data bus implementation, now meets timing even with keep_hierarchy
Stefan Schuermans authored on 2012-02-21 20:40:30
February 20, 2012
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begin of ethernet RX implementation, so far only test interface to core, does not meet timing
Stefan Schuermans authored on 2012-02-20 21:16:03
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increased code and data address range to 8KB
Stefan Schuermans authored on 2012-02-20 15:55:19
February 16, 2012
February 12, 2012
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implemented loading of data memory from firmware
Stefan Schuermans authored on 2012-02-12 17:47:50
February 11, 2012
February 10, 2012
February 7, 2012
February 6, 2012
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implented basic system with core, instr memory, data memory
Stefan Schuermans authored on 2012-02-06 21:28:00