MIPS I system running on Xilinx Spartan-3A FPGA Starter Kit: VHDL code for processor core very similar to MIPS I and for several peripherals, C firmware to run on this system

Stefan Schuermans Stefan Schuermans implementation of LWL, LWR 1aa8d74 @ 2012-02-05 16:25:55
constraints start of MIPS core: begin of decoder and ALU 2012-01-23 22:06:18
doc MIPS ISA spec 2012-01-24 21:41:27
mips implementation of LWL, LWR 2012-02-05 16:25:55
.gitignore start of MIPS core: begin of decoder and ALU 2012-01-23 22:06:18
mips_sys.xise compare unit, initial PC ideas 2012-01-25 18:56:29