MIPS I system running on Xilinx Spartan-3A FPGA Starter Kit: VHDL code for processor core very similar to MIPS I and for several peripherals, C firmware to run on this system

Stefan Schuermans Stefan Schuermans implemented ethernet RX busmaster -> packet reception working c906a48 @ 2012-03-03 23:42:55
..
system.vhd implemented ethernet RX busmaster -> packet reception working 2012-03-03 23:42:55