MIPS I system running on Xilinx Spartan-3A FPGA Starter Kit: VHDL code for processor core very similar to MIPS I and for several peripherals, C firmware to run on this system

Stefan Schuermans Stefan Schuermans fix input of program in tesbed c7685d8 @ 2012-02-09 20:43:40
constraints start of MIPS core: begin of decoder and ALU 2012-01-23 22:06:18
doc MIPS ISA spec 2012-01-24 21:41:27
fw fix input of program in tesbed 2012-02-09 20:43:40
mips start with PC 0 2012-02-09 20:43:15
system initial firmware and testbed 2012-02-07 21:43:07
test fix input of program in tesbed 2012-02-09 20:43:40
.gitignore initial firmware and testbed 2012-02-07 21:43:07
mips_sys.xise fix input of program in tesbed 2012-02-09 20:43:40