MIPS I system running on Xilinx Spartan-3A FPGA Starter Kit: VHDL code for processor core very similar to MIPS I and for several peripherals, C firmware to run on this system
Stefan Schuermans
wave config for simulation
ae745be @ 2012-02-09 21:31:29
| constraints | start of MIPS core: begin of decoder and ALU | 2012-01-23 22:06:18 |
|---|---|---|
| doc | MIPS ISA spec | 2012-01-24 21:41:27 |
| fw | align stack pointer | 2012-02-09 20:48:21 |
| mips | fixed instruction fetch during stall | 2012-02-09 21:31:07 |
| system | initial firmware and testbed | 2012-02-07 21:43:07 |
| test | fix input of program in tesbed | 2012-02-09 20:43:40 |
| .gitignore | initial firmware and testbed | 2012-02-07 21:43:07 |
| Default.wcfg | wave config for simulation | 2012-02-09 21:31:29 |
| mips_sys.xise | fix input of program in tesbed | 2012-02-09 20:43:40 |