MIPS I system running on Xilinx Spartan-3A FPGA Starter Kit: VHDL code for processor core very similar to MIPS I and for several peripherals, C firmware to run on this system
Stefan Schuermans
added padding of ethernet packets to 60 bytes data min ARP is working now
55a4ef9 @ 2012-03-21 21:43:38
| .. | ||
|---|---|---|
| eth_pack.hex | implemented ethernet RX busmaster -> packet reception working | 2012-03-03 23:42:55 |
| eth_pack.nib | implemented ethernet RX busmaster -> packet reception working | 2012-03-03 23:42:55 |
| eth_tx_log_2_c_data.pl | script to convert testbed log to C data array | 2012-03-21 21:42:02 |