MIPS I system running on Xilinx Spartan-3A FPGA Starter Kit: VHDL code for processor core very similar to MIPS I and for several peripherals, C firmware to run on this system

Stefan Schuermans Stefan Schuermans fixed decoding of M[FT]{HI|LO} 48bb600 @ 2012-03-13 21:11:43
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eth_pack.hex implemented ethernet RX busmaster -> packet reception working 2012-03-03 23:42:55
eth_pack.nib implemented ethernet RX busmaster -> packet reception working 2012-03-03 23:42:55