MIPS I system running on Xilinx Spartan-3A FPGA Starter Kit: VHDL code for processor core very similar to MIPS I and for several peripherals, C firmware to run on this system
Stefan Schuermans
s operand is number of bits
1a57241 @ 2012-01-24 21:08:12
| constraints | start of MIPS core: begin of decoder and ALU | 2012-01-23 22:06:18 |
|---|---|---|
| doc | some links to MIPS ISA documentation | 2012-01-23 22:11:08 |
| mips | s operand is number of bits | 2012-01-24 21:08:12 |
| .gitignore | start of MIPS core: begin of decoder and ALU | 2012-01-23 22:06:18 |
| mips_sys.xise | separated shifter from ALU | 2012-01-24 20:43:21 |