mips_sys

implemented "register 0 is always 0" in a faster way
Parent ee62a05
Stefan Schuermans

Stefan Schuermans commited on 2012-01-26 21:17:30
Showing 1 changed files, with 16 additions and 2 deletions.

mips/regs.vhd
View file @ 9a63a17
... ... 
@@ -32,16 +32,30 @@ ARCHITECTURE a_mips_regs OF e_mips_regs IS
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 BEGIN
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+    p_read_a: PROCESS(i_rd_a_no)
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+    BEGIN
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+        IF i_rd_a_no = "00000" THEN
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+            o_rd_a_data <= X"00000000";
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+        ELSE
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             o_rd_a_data <= r_regs(no2idx(i_rd_a_no));
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+        END IF;
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+    END PROCESS p_read_a;
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+    p_read_b: PROCESS(i_rd_a_no)
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+    BEGIN
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+        IF i_rd_b_no = "00000" THEN
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+            o_rd_b_data <= X"00000000";
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+        ELSE
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             o_rd_b_data <= r_regs(no2idx(i_rd_b_no));
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+        END IF;
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+    END PROCESS p_read_b;
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     p_write: PROCESS(rst, clk)
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     BEGIN
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         IF rst = '1' THEN
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-            r_regs <= (OTHERS => X"00000000");
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+            -- r_regs <= (OTHERS => X"00000000");
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         ELSIF rising_edge(clk) THEN
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-            IF i_wr_en = '1' AND i_wr_no /= "00000" THEN
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+            IF i_wr_en = '1' THEN
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                 r_regs(no2idx(i_wr_no)) <= i_wr_data;
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             END IF;
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         END IF;
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