MIPS I system running on Xilinx Spartan-3A FPGA Starter Kit: VHDL code for processor core very similar to MIPS I and for several peripherals, C firmware to run on this system
Stefan Schuermans
start of MIPS core: begin of decoder and ALU
ee91dd2 @ 2012-01-23 22:06:18
| constraints | start of MIPS core: begin of decoder and ALU | 2012-01-23 22:06:18 |
|---|---|---|
| mips | start of MIPS core: begin of decoder and ALU | 2012-01-23 22:06:18 |
| .gitignore | start of MIPS core: begin of decoder and ALU | 2012-01-23 22:06:18 |
| mips_sys.xise | start of MIPS core: begin of decoder and ALU | 2012-01-23 22:06:18 |