MIPS I system running on Xilinx Spartan-3A FPGA Starter Kit: VHDL code for processor core very similar to MIPS I and for several peripherals, C firmware to run on this system
Stefan Schuermans
added decoding of simple load/store instructions and lui instruction implemented lui instruction fix syntax bug in regs
ee62a05 @ 2012-01-26 20:50:15
| .. | ||
|---|---|---|
| clk.ucf | start of MIPS core: begin of decoder and ALU | 2012-01-23 22:06:18 |
| rst.ucf | start of MIPS core: begin of decoder and ALU | 2012-01-23 22:06:18 |