MIPS I system running on Xilinx Spartan-3A FPGA Starter Kit: VHDL code for processor core very similar to MIPS I and for several peripherals, C firmware to run on this system

Stefan Schuermans Stefan Schuermans rename src/dest to more general name cbae278 @ 2012-01-24 21:00:05
constraints start of MIPS core: begin of decoder and ALU 2012-01-23 22:06:18
doc some links to MIPS ISA documentation 2012-01-23 22:11:08
mips rename src/dest to more general name 2012-01-24 21:00:05
.gitignore start of MIPS core: begin of decoder and ALU 2012-01-23 22:06:18
mips_sys.xise separated shifter from ALU 2012-01-24 20:43:21