MIPS I system running on Xilinx Spartan-3A FPGA Starter Kit: VHDL code for processor core very similar to MIPS I and for several peripherals, C firmware to run on this system
constraints | start of MIPS core: begin of decoder and ALU | 2012-01-23 22:06:18 |
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doc | some links to MIPS ISA documentation | 2012-01-23 22:11:08 |
mips | start of MIPS core: begin of decoder and ALU | 2012-01-23 22:06:18 |
.gitignore | start of MIPS core: begin of decoder and ALU | 2012-01-23 22:06:18 |
mips_sys.xise | start of MIPS core: begin of decoder and ALU | 2012-01-23 22:06:18 |