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55b68e6
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master
stefan.experimental
partlib
gschem_sym
ATMEGA8.sym
move to subdir
Stefan Schuermans
commited
55b68e6
at 2014-01-11 13:18:24
ATMEGA8.sym
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v 20061020 1 T 3500 4700 8 10 1 1 0 6 1 refdes=IC? T 400 6050 5 10 0 0 0 0 1 device=ATMEGA8 P 0 3400 300 3400 1 0 0 { T 200 3450 5 8 1 1 0 6 1 pinnumber=1 T 200 3350 5 8 0 1 0 8 1 pinseq=1 T 350 3400 9 8 1 1 0 0 1 pinlabel=PC6 (nRESET) T 350 3400 5 8 0 1 0 2 1 pintype=in } B 300 0 3200 4600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 T 400 7050 5 10 0 0 0 0 1 numslots=0 T 300 4700 8 10 1 1 0 0 1 value=ATMEGA8 P 0 2600 300 2600 1 0 0 { T 200 2650 5 8 1 1 0 6 1 pinnumber=9 T 200 2550 5 8 0 1 0 8 1 pinseq=9 T 350 2600 9 8 1 1 0 0 1 pinlabel=PB6 (XTAL1/TOSC1) T 350 2600 5 8 0 1 0 2 1 pintype=io } P 0 2000 300 2000 1 0 0 { T 200 2050 5 8 1 1 0 6 1 pinnumber=10 T 200 1950 5 8 0 1 0 8 1 pinseq=10 T 350 2000 9 8 1 1 0 0 1 pinlabel=PB7 (XTAL2/TOSC2) T 350 2000 5 8 0 1 0 2 1 pintype=io } P 0 1200 300 1200 1 0 0 { T 200 1250 5 8 1 1 0 6 1 pinnumber=21 T 200 1150 5 8 0 1 0 8 1 pinseq=21 T 350 1200 9 8 1 1 0 0 1 pinlabel=AREF T 350 1200 5 8 0 1 0 2 1 pintype=in } P 0 4400 300 4400 1 0 0 { T 200 4450 5 8 1 1 0 6 1 pinnumber=20 T 200 4350 5 8 0 1 0 8 1 pinseq=20 T 350 4400 9 8 1 1 0 0 1 pinlabel=AVCC T 350 4400 5 8 0 1 0 2 1 pintype=pwr } P 0 4000 300 4000 1 0 0 { T 200 4050 5 8 1 1 0 6 1 pinnumber=7 T 200 3950 5 8 0 1 0 8 1 pinseq=7 T 350 4000 9 8 1 1 0 0 1 pinlabel=VCC T 350 4000 5 8 0 1 0 2 1 pintype=pwr } P 0 400 300 400 1 0 0 { T 200 450 5 8 1 1 0 6 1 pinnumber=8 T 200 350 5 8 0 1 0 8 1 pinseq=8 T 350 400 9 8 1 1 0 0 1 pinlabel=GND1 T 350 400 5 8 0 1 0 2 1 pintype=pwr } P 0 200 300 200 1 0 0 { T 200 250 5 8 1 1 0 6 1 pinnumber=22 T 200 150 5 8 0 1 0 8 1 pinseq=22 T 350 200 9 8 1 1 0 0 1 pinlabel=GND2 T 350 200 5 8 0 1 0 2 1 pintype=pwr } P 3800 200 3500 200 1 0 0 { T 3600 250 5 8 1 1 0 0 1 pinnumber=2 T 3600 150 5 8 0 1 0 2 1 pinseq=2 T 3450 200 9 8 1 1 0 6 1 pinlabel=PD0 (RXD) T 3450 200 5 8 0 1 0 8 1 pintype=io } P 3800 400 3500 400 1 0 0 { T 3600 450 5 8 1 1 0 0 1 pinnumber=3 T 3600 350 5 8 0 1 0 2 1 pinseq=3 T 3450 400 9 8 1 1 0 6 1 pinlabel=PD1 (TXD) T 3450 400 5 8 0 1 0 8 1 pintype=io } P 3800 600 3500 600 1 0 0 { T 3600 650 5 8 1 1 0 0 1 pinnumber=4 T 3600 550 5 8 0 1 0 2 1 pinseq=4 T 3450 600 9 8 1 1 0 6 1 pinlabel=PD2 (INT0) T 3450 600 5 8 0 1 0 8 1 pintype=io } P 3800 800 3500 800 1 0 0 { T 3600 850 5 8 1 1 0 0 1 pinnumber=5 T 3600 750 5 8 0 1 0 2 1 pinseq=5 T 3450 800 9 8 1 1 0 6 1 pinlabel=PD3 (INT1) T 3450 800 5 8 0 1 0 8 1 pintype=io } P 3800 1000 3500 1000 1 0 0 { T 3600 1050 5 8 1 1 0 0 1 pinnumber=6 T 3600 950 5 8 0 1 0 2 1 pinseq=6 T 3450 1000 9 8 1 1 0 6 1 pinlabel=PD4 (XCK/T0) T 3450 1000 5 8 0 1 0 8 1 pintype=io } P 3800 1200 3500 1200 1 0 0 { T 3600 1250 5 8 1 1 0 0 1 pinnumber=11 T 3600 1150 5 8 0 1 0 2 1 pinseq=11 T 3450 1200 9 8 1 1 0 6 1 pinlabel=PD5 (T1) T 3450 1200 5 8 0 1 0 8 1 pintype=io } P 3800 1400 3500 1400 1 0 0 { T 3600 1450 5 8 1 1 0 0 1 pinnumber=12 T 3600 1350 5 8 0 1 0 2 1 pinseq=12 T 3450 1400 9 8 1 1 0 6 1 pinlabel=PD6 (AIN0) T 3450 1400 5 8 0 1 0 8 1 pintype=io } P 3800 1600 3500 1600 1 0 0 { T 3600 1650 5 8 1 1 0 0 1 pinnumber=13 T 3600 1550 5 8 0 1 0 2 1 pinseq=13 T 3450 1600 9 8 1 1 0 6 1 pinlabel=PD7 (AIN1) T 3450 1600 5 8 0 1 0 8 1 pintype=io } P 3800 2000 3500 2000 1 0 0 { T 3600 2050 5 8 1 1 0 0 1 pinnumber=23 T 3600 1950 5 8 0 1 0 2 1 pinseq=23 T 3450 2000 9 8 1 1 0 6 1 pinlabel=PC0 (ADC0) T 3450 2000 5 8 0 1 0 8 1 pintype=io } P 3800 2200 3500 2200 1 0 0 { T 3600 2250 5 8 1 1 0 0 1 pinnumber=24 T 3600 2150 5 8 0 1 0 2 1 pinseq=24 T 3450 2200 9 8 1 1 0 6 1 pinlabel=PC1 (ADC1) T 3450 2200 5 8 0 1 0 8 1 pintype=io } P 3800 2400 3500 2400 1 0 0 { T 3600 2450 5 8 1 1 0 0 1 pinnumber=25 T 3600 2350 5 8 0 1 0 2 1 pinseq=25 T 3450 2400 9 8 1 1 0 6 1 pinlabel=PC2 (ADC2) T 3450 2400 5 8 0 1 0 8 1 pintype=io } P 3800 2600 3500 2600 1 0 0 { T 3600 2650 5 8 1 1 0 0 1 pinnumber=26 T 3600 2550 5 8 0 1 0 2 1 pinseq=26 T 3450 2600 9 8 1 1 0 6 1 pinlabel=PC3 (ADC3) T 3450 2600 5 8 0 1 0 8 1 pintype=io } P 3800 2800 3500 2800 1 0 0 { T 3600 2850 5 8 1 1 0 0 1 pinnumber=27 T 3600 2750 5 8 0 1 0 2 1 pinseq=27 T 3450 2800 9 8 1 1 0 6 1 pinlabel=PC4 (ADC4/SDA) T 3450 2800 5 8 0 1 0 8 1 pintype=io } P 3800 3000 3500 3000 1 0 0 { T 3600 3050 5 8 1 1 0 0 1 pinnumber=28 T 3600 2950 5 8 0 1 0 2 1 pinseq=28 T 3450 3000 9 8 1 1 0 6 1 pinlabel=PC5 (ADC5/SCL) T 3450 3000 5 8 0 1 0 8 1 pintype=io } P 3800 3400 3500 3400 1 0 0 { T 3600 3450 5 8 1 1 0 0 1 pinnumber=14 T 3600 3350 5 8 0 1 0 2 1 pinseq=14 T 3450 3400 9 8 1 1 0 6 1 pinlabel=PB0 (ICP1) T 3450 3400 5 8 0 1 0 8 1 pintype=io } P 3800 3600 3500 3600 1 0 0 { T 3600 3650 5 8 1 1 0 0 1 pinnumber=15 T 3600 3550 5 8 0 1 0 2 1 pinseq=15 T 3450 3600 9 8 1 1 0 6 1 pinlabel=PB1 (OC1A) T 3450 3600 5 8 0 1 0 8 1 pintype=io } P 3800 3800 3500 3800 1 0 0 { T 3600 3850 5 8 1 1 0 0 1 pinnumber=16 T 3600 3750 5 8 0 1 0 2 1 pinseq=16 T 3450 3800 9 8 1 1 0 6 1 pinlabel=PB2 (nSS/OC1B) T 3450 3800 5 8 0 1 0 8 1 pintype=io } P 3800 4000 3500 4000 1 0 0 { T 3600 4050 5 8 1 1 0 0 1 pinnumber=17 T 3600 3950 5 8 0 1 0 2 1 pinseq=17 T 3450 4000 9 8 1 1 0 6 1 pinlabel=PB3 (MOSI/OC2) T 3450 4000 5 8 0 1 0 8 1 pintype=io } P 3800 4200 3500 4200 1 0 0 { T 3600 4250 5 8 1 1 0 0 1 pinnumber=18 T 3600 4150 5 8 0 1 0 2 1 pinseq=18 T 3450 4200 9 8 1 1 0 6 1 pinlabel=PB4 (MISO) T 3450 4200 5 8 0 1 0 8 1 pintype=io } P 3800 4400 3500 4400 1 0 0 { T 3600 4450 5 8 1 1 0 0 1 pinnumber=19 T 3600 4350 5 8 0 1 0 2 1 pinseq=19 T 3450 4400 9 8 1 1 0 6 1 pinlabel=PB5 (SCK) T 3450 4400 5 8 0 1 0 8 1 pintype=io }