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master
stefan.experimental
partlib
ATMEGA128.sym
initial commit
Stefan Schuermans
commited
b51510c
at 2012-10-03 10:15:05
ATMEGA128.sym
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Raw
v 20050313 1 T 3500 9500 8 10 1 1 0 6 1 refdes=IC? T 400 6050 5 10 0 0 0 0 1 device=ATMEGA128 P 0 9000 300 9000 1 0 0 { T 200 9050 5 8 1 1 0 6 1 pinnumber=20 T 200 8950 5 8 0 1 0 8 1 pinseq=20 T 350 9000 9 8 1 1 0 0 1 pinlabel=nRESET T 350 9000 5 8 0 1 0 2 1 pintype=in } P 0 1800 300 1800 1 0 0 { T 200 1850 5 8 1 1 0 6 1 pinnumber=54 T 200 1750 5 8 0 1 0 8 1 pinseq=54 T 350 1800 9 8 1 1 0 0 1 pinlabel=PF7 (ADC7/TDI) T 350 1800 5 8 0 1 0 2 1 pintype=io } P 3800 400 3500 400 1 0 0 { T 3600 450 5 8 1 1 0 0 1 pinnumber=2 T 3600 350 5 8 0 1 0 2 1 pinseq=2 T 3450 400 9 8 1 1 0 6 1 pinlabel=PE0 (RXD0/PDI) T 3450 400 5 8 0 1 0 8 1 pintype=io } B 300 0 3200 9400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 T 400 7050 5 10 0 0 0 0 1 numslots=0 T 300 9500 8 10 1 1 0 0 1 value=ATMEGA128 P 0 7600 300 7600 1 0 0 { T 200 7650 5 8 1 1 0 6 1 pinnumber=24 T 200 7550 5 8 0 1 0 8 1 pinseq=24 T 350 7600 9 8 1 1 0 0 1 pinlabel=XTAL1 T 350 7600 5 8 0 1 0 2 1 pintype=in } P 0 8200 300 8200 1 0 0 { T 200 8250 5 8 1 1 0 6 1 pinnumber=23 T 200 8150 5 8 0 1 0 8 1 pinseq=23 T 350 8200 9 8 1 1 0 0 1 pinlabel=XTAL2 T 350 8200 5 8 0 1 0 2 1 pintype=out } P 0 7000 300 7000 1 0 0 { T 200 7050 5 8 1 1 0 6 1 pinnumber=62 T 200 6950 5 8 0 1 0 8 1 pinseq=62 T 350 7000 9 8 1 1 0 0 1 pinlabel=AREF T 350 7000 5 8 0 1 0 2 1 pintype=in } P 0 6800 300 6800 1 0 0 { T 200 6850 5 8 1 1 0 6 1 pinnumber=64 T 200 6750 5 8 0 1 0 8 1 pinseq=64 T 350 6800 9 8 1 1 0 0 1 pinlabel=AVCC T 350 6800 5 8 0 1 0 2 1 pintype=pwr } P 0 6600 300 6600 1 0 0 { T 200 6650 5 8 1 1 0 6 1 pinnumber=63 T 200 6550 5 8 0 1 0 8 1 pinseq=63 T 350 6600 9 8 1 1 0 0 1 pinlabel=AGND T 350 6600 5 8 0 1 0 2 1 pintype=pwr } P 0 6000 300 6000 1 0 0 { T 200 6050 5 8 1 1 0 6 1 pinnumber=21 T 200 5950 5 8 0 1 0 8 1 pinseq=21 T 350 6000 9 8 1 1 0 0 1 pinlabel=VCC1 T 350 6000 5 8 0 1 0 2 1 pintype=pwr } P 0 5800 300 5800 1 0 0 { T 200 5850 5 8 1 1 0 6 1 pinnumber=52 T 200 5750 5 8 0 1 0 8 1 pinseq=52 T 350 5800 9 8 1 1 0 0 1 pinlabel=VCC2 T 350 5800 5 8 0 1 0 2 1 pintype=pwr } P 0 5600 300 5600 1 0 0 { T 200 5650 5 8 1 1 0 6 1 pinnumber=22 T 200 5550 5 8 0 1 0 8 1 pinseq=22 T 350 5600 9 8 1 1 0 0 1 pinlabel=GND1 T 350 5600 5 8 0 1 0 2 1 pintype=pwr } P 0 5400 300 5400 1 0 0 { T 200 5450 5 8 1 1 0 6 1 pinnumber=53 T 200 5350 5 8 0 1 0 8 1 pinseq=53 T 350 5400 9 8 1 1 0 0 1 pinlabel=GND2 T 350 5400 5 8 0 1 0 2 1 pintype=pwr } P 0 4800 300 4800 1 0 0 { T 200 4850 5 8 1 1 0 6 1 pinnumber=19 T 200 4750 5 8 0 1 0 8 1 pinseq=19 T 350 4800 9 8 1 1 0 0 1 pinlabel=PG4 (TOSC1) T 350 4800 5 8 0 1 0 2 1 pintype=io } P 0 4600 300 4600 1 0 0 { T 200 4650 5 8 1 1 0 6 1 pinnumber=18 T 200 4550 5 8 0 1 0 8 1 pinseq=18 T 350 4600 9 8 1 1 0 0 1 pinlabel=PG3 (TOSC2) T 350 4600 5 8 0 1 0 2 1 pintype=io } P 0 4400 300 4400 1 0 0 { T 200 4450 5 8 1 1 0 6 1 pinnumber=43 T 200 4350 5 8 0 1 0 8 1 pinseq=43 T 350 4400 9 8 1 1 0 0 1 pinlabel=PG2 (ALE) T 350 4400 5 8 0 1 0 2 1 pintype=io } P 0 4200 300 4200 1 0 0 { T 200 4250 5 8 1 1 0 6 1 pinnumber=34 T 200 4150 5 8 0 1 0 8 1 pinseq=34 T 350 4200 9 8 1 1 0 0 1 pinlabel=PG1 (nRD) T 350 4200 5 8 0 1 0 2 1 pintype=io } P 0 4000 300 4000 1 0 0 { T 200 4050 5 8 1 1 0 6 1 pinnumber=33 T 200 3950 5 8 0 1 0 8 1 pinseq=33 T 350 4000 9 8 1 1 0 0 1 pinlabel=PG0 (nWR) T 350 4000 5 8 0 1 0 2 1 pintype=io } P 0 3400 300 3400 1 0 0 { T 200 3450 5 8 1 1 0 6 1 pinnumber=1 T 200 3350 5 8 0 1 0 8 1 pinseq=1 T 350 3400 9 8 1 1 0 0 1 pinlabel=nPEN T 350 3400 5 8 0 1 0 2 1 pintype=in } P 0 1600 300 1600 1 0 0 { T 200 1650 5 8 1 1 0 6 1 pinnumber=55 T 200 1550 5 8 0 1 0 8 1 pinseq=55 T 350 1600 9 8 1 1 0 0 1 pinlabel=PF6 (ADC6/TDO) T 350 1600 5 8 0 1 0 2 1 pintype=io } P 0 1400 300 1400 1 0 0 { T 200 1450 5 8 1 1 0 6 1 pinnumber=56 T 200 1350 5 8 0 1 0 8 1 pinseq=56 T 350 1400 9 8 1 1 0 0 1 pinlabel=PF5 (ADC5/TMS) T 350 1400 5 8 0 1 0 2 1 pintype=io } P 0 1200 300 1200 1 0 0 { T 200 1250 5 8 1 1 0 6 1 pinnumber=57 T 200 1150 5 8 0 1 0 8 1 pinseq=57 T 350 1200 9 8 1 1 0 0 1 pinlabel=PF4 (ADC4/TCK) T 350 1200 5 8 0 1 0 2 1 pintype=io } P 0 1000 300 1000 1 0 0 { T 200 1050 5 8 1 1 0 6 1 pinnumber=58 T 200 950 5 8 0 1 0 8 1 pinseq=58 T 350 1000 9 8 1 1 0 0 1 pinlabel=PF3 (ADC3) T 350 1000 5 8 0 1 0 2 1 pintype=io } P 0 800 300 800 1 0 0 { T 200 850 5 8 1 1 0 6 1 pinnumber=59 T 200 750 5 8 0 1 0 8 1 pinseq=59 T 350 800 9 8 1 1 0 0 1 pinlabel=PF2 (ADC2) T 350 800 5 8 0 1 0 2 1 pintype=io } P 0 600 300 600 1 0 0 { T 200 650 5 8 1 1 0 6 1 pinnumber=60 T 200 550 5 8 0 1 0 8 1 pinseq=60 T 350 600 9 8 1 1 0 0 1 pinlabel=PF1 (ADC1) T 350 600 5 8 0 1 0 2 1 pintype=io } P 0 400 300 400 1 0 0 { T 200 450 5 8 1 1 0 6 1 pinnumber=61 T 200 350 5 8 0 1 0 8 1 pinseq=61 T 350 400 9 8 1 1 0 0 1 pinlabel=PF0 (ADC0) T 350 400 5 8 0 1 0 2 1 pintype=io } P 3800 600 3500 600 1 0 0 { T 3600 650 5 8 1 1 0 0 1 pinnumber=3 T 3600 550 5 8 0 1 0 2 1 pinseq=3 T 3450 600 9 8 1 1 0 6 1 pinlabel=PE1 (TXD0/PDO) T 3450 600 5 8 0 1 0 8 1 pintype=io } P 3800 800 3500 800 1 0 0 { T 3600 850 5 8 1 1 0 0 1 pinnumber=4 T 3600 750 5 8 0 1 0 2 1 pinseq=4 T 3450 800 9 8 1 1 0 6 1 pinlabel=PE2 (XCK0/AIN0) T 3450 800 5 8 0 1 0 8 1 pintype=io } P 3800 1000 3500 1000 1 0 0 { T 3600 1050 5 8 1 1 0 0 1 pinnumber=5 T 3600 950 5 8 0 1 0 2 1 pinseq=5 T 3450 1000 9 8 1 1 0 6 1 pinlabel=PE3 (OC3A/AIN1) T 3450 1000 5 8 0 1 0 8 1 pintype=io } P 3800 1200 3500 1200 1 0 0 { T 3600 1250 5 8 1 1 0 0 1 pinnumber=6 T 3600 1150 5 8 0 1 0 2 1 pinseq=6 T 3450 1200 9 8 1 1 0 6 1 pinlabel=PE4 (OC3B/INT4) T 3450 1200 5 8 0 1 0 8 1 pintype=io } P 3800 1400 3500 1400 1 0 0 { T 3600 1450 5 8 1 1 0 0 1 pinnumber=7 T 3600 1350 5 8 0 1 0 2 1 pinseq=7 T 3450 1400 9 8 1 1 0 6 1 pinlabel=PE5 (OC3C/INT5) T 3450 1400 5 8 0 1 0 8 1 pintype=io } P 3800 1600 3500 1600 1 0 0 { T 3600 1650 5 8 1 1 0 0 1 pinnumber=8 T 3600 1550 5 8 0 1 0 2 1 pinseq=8 T 3450 1600 9 8 1 1 0 6 1 pinlabel=PE6 (T3/INT6) T 3450 1600 5 8 0 1 0 8 1 pintype=io } P 3800 1800 3500 1800 1 0 0 { T 3600 1850 5 8 1 1 0 0 1 pinnumber=9 T 3600 1750 5 8 0 1 0 2 1 pinseq=9 T 3450 1800 9 8 1 1 0 6 1 pinlabel=PE7 (ICP3/INT7) T 3450 1800 5 8 0 1 0 8 1 pintype=io } P 3800 2200 3500 2200 1 0 0 { T 3600 2250 5 8 1 1 0 0 1 pinnumber=25 T 3600 2150 5 8 0 1 0 2 1 pinseq=25 T 3450 2200 9 8 1 1 0 6 1 pinlabel=PD0 (SCL/INT0) T 3450 2200 5 8 0 1 0 8 1 pintype=io } P 3800 2400 3500 2400 1 0 0 { T 3600 2450 5 8 1 1 0 0 1 pinnumber=26 T 3600 2350 5 8 0 1 0 2 1 pinseq=26 T 3450 2400 9 8 1 1 0 6 1 pinlabel=PD1 (SDA/INT1) T 3450 2400 5 8 0 1 0 8 1 pintype=io } P 3800 2600 3500 2600 1 0 0 { T 3600 2650 5 8 1 1 0 0 1 pinnumber=27 T 3600 2550 5 8 0 1 0 2 1 pinseq=27 T 3450 2600 9 8 1 1 0 6 1 pinlabel=PD2 (RXD1/INT2) T 3450 2600 5 8 0 1 0 8 1 pintype=io } P 3800 2800 3500 2800 1 0 0 { T 3600 2850 5 8 1 1 0 0 1 pinnumber=28 T 3600 2750 5 8 0 1 0 2 1 pinseq=28 T 3450 2800 9 8 1 1 0 6 1 pinlabel=PD3 (TXD1/INT3) T 3450 2800 5 8 0 1 0 8 1 pintype=io } P 3800 3000 3500 3000 1 0 0 { T 3600 3050 5 8 1 1 0 0 1 pinnumber=29 T 3600 2950 5 8 0 1 0 2 1 pinseq=29 T 3450 3000 9 8 1 1 0 6 1 pinlabel=PD4 (ICP1) T 3450 3000 5 8 0 1 0 8 1 pintype=io } P 3800 3200 3500 3200 1 0 0 { T 3600 3250 5 8 1 1 0 0 1 pinnumber=30 T 3600 3150 5 8 0 1 0 2 1 pinseq=30 T 3450 3200 9 8 1 1 0 6 1 pinlabel=PD5 (XCK1) T 3450 3200 5 8 0 1 0 8 1 pintype=io } P 3800 3400 3500 3400 1 0 0 { T 3600 3450 5 8 1 1 0 0 1 pinnumber=31 T 3600 3350 5 8 0 1 0 2 1 pinseq=31 T 3450 3400 9 8 1 1 0 6 1 pinlabel=PD6 (T1) T 3450 3400 5 8 0 1 0 8 1 pintype=io } P 3800 3600 3500 3600 1 0 0 { T 3600 3650 5 8 1 1 0 0 1 pinnumber=32 T 3600 3550 5 8 0 1 0 2 1 pinseq=32 T 3450 3600 9 8 1 1 0 6 1 pinlabel=PD7 (T2) T 3450 3600 5 8 0 1 0 8 1 pintype=io } P 3800 4000 3500 4000 1 0 0 { T 3600 4050 5 8 1 1 0 0 1 pinnumber=35 T 3600 3950 5 8 0 1 0 2 1 pinseq=35 T 3450 4000 9 8 1 1 0 6 1 pinlabel=PC0 (A8) T 3450 4000 5 8 0 1 0 8 1 pintype=io } P 3800 4200 3500 4200 1 0 0 { T 3600 4250 5 8 1 1 0 0 1 pinnumber=36 T 3600 4150 5 8 0 1 0 2 1 pinseq=36 T 3450 4200 9 8 1 1 0 6 1 pinlabel=PC1 (A9) T 3450 4200 5 8 0 1 0 8 1 pintype=io } P 3800 4400 3500 4400 1 0 0 { T 3600 4450 5 8 1 1 0 0 1 pinnumber=37 T 3600 4350 5 8 0 1 0 2 1 pinseq=37 T 3450 4400 9 8 1 1 0 6 1 pinlabel=PC2 (A10) T 3450 4400 5 8 0 1 0 8 1 pintype=io } P 3800 4600 3500 4600 1 0 0 { T 3600 4650 5 8 1 1 0 0 1 pinnumber=38 T 3600 4550 5 8 0 1 0 2 1 pinseq=38 T 3450 4600 9 8 1 1 0 6 1 pinlabel=PC3 (A11) T 3450 4600 5 8 0 1 0 8 1 pintype=io } P 3800 4800 3500 4800 1 0 0 { T 3600 4850 5 8 1 1 0 0 1 pinnumber=39 T 3600 4750 5 8 0 1 0 2 1 pinseq=39 T 3450 4800 9 8 1 1 0 6 1 pinlabel=PC4 (A12) T 3450 4800 5 8 0 1 0 8 1 pintype=io } P 3800 5000 3500 5000 1 0 0 { T 3600 5050 5 8 1 1 0 0 1 pinnumber=40 T 3600 4950 5 8 0 1 0 2 1 pinseq=40 T 3450 5000 9 8 1 1 0 6 1 pinlabel=PC5 (A13) T 3450 5000 5 8 0 1 0 8 1 pintype=io } P 3800 5200 3500 5200 1 0 0 { T 3600 5250 5 8 1 1 0 0 1 pinnumber=41 T 3600 5150 5 8 0 1 0 2 1 pinseq=41 T 3450 5200 9 8 1 1 0 6 1 pinlabel=PC6 (A14) T 3450 5200 5 8 0 1 0 8 1 pintype=io } P 3800 5400 3500 5400 1 0 0 { T 3600 5450 5 8 1 1 0 0 1 pinnumber=42 T 3600 5350 5 8 0 1 0 2 1 pinseq=42 T 3450 5400 9 8 1 1 0 6 1 pinlabel=PC7 (A15) T 3450 5400 5 8 0 1 0 8 1 pintype=io } P 3800 5800 3500 5800 1 0 0 { T 3600 5850 5 8 1 1 0 0 1 pinnumber=10 T 3600 5750 5 8 0 1 0 2 1 pinseq=10 T 3450 5800 9 8 1 1 0 6 1 pinlabel=PB0 (nSS) T 3450 5800 5 8 0 1 0 8 1 pintype=io } P 3800 6000 3500 6000 1 0 0 { T 3600 6050 5 8 1 1 0 0 1 pinnumber=11 T 3600 5950 5 8 0 1 0 2 1 pinseq=11 T 3450 6000 9 8 1 1 0 6 1 pinlabel=PB1 (SCK) T 3450 6000 5 8 0 1 0 8 1 pintype=io } P 3800 6200 3500 6200 1 0 0 { T 3600 6250 5 8 1 1 0 0 1 pinnumber=12 T 3600 6150 5 8 0 1 0 2 1 pinseq=12 T 3450 6200 9 8 1 1 0 6 1 pinlabel=PB2 (MOSI) T 3450 6200 5 8 0 1 0 8 1 pintype=io } P 3800 6400 3500 6400 1 0 0 { T 3600 6450 5 8 1 1 0 0 1 pinnumber=13 T 3600 6350 5 8 0 1 0 2 1 pinseq=13 T 3450 6400 9 8 1 1 0 6 1 pinlabel=PB3 (MISO) T 3450 6400 5 8 0 1 0 8 1 pintype=io } P 3800 6600 3500 6600 1 0 0 { T 3600 6650 5 8 1 1 0 0 1 pinnumber=14 T 3600 6550 5 8 0 1 0 2 1 pinseq=14 T 3450 6600 9 8 1 1 0 6 1 pinlabel=PB4 (OC0) T 3450 6600 5 8 0 1 0 8 1 pintype=io } P 3800 6800 3500 6800 1 0 0 { T 3600 6850 5 8 1 1 0 0 1 pinnumber=15 T 3600 6750 5 8 0 1 0 2 1 pinseq=15 T 3450 6800 9 8 1 1 0 6 1 pinlabel=PB5 (OC1A) T 3450 6800 5 8 0 1 0 8 1 pintype=io } P 3800 7000 3500 7000 1 0 0 { T 3600 7050 5 8 1 1 0 0 1 pinnumber=16 T 3600 6950 5 8 0 1 0 2 1 pinseq=16 T 3450 7000 9 8 1 1 0 6 1 pinlabel=PB6 (OC1B) T 3450 7000 5 8 0 1 0 8 1 pintype=io } P 3800 7200 3500 7200 1 0 0 { T 3600 7250 5 8 1 1 0 0 1 pinnumber=17 T 3600 7150 5 8 0 1 0 2 1 pinseq=17 T 3450 7200 9 8 1 1 0 6 1 pinlabel=PB7 (OC2/OC1C) T 3450 7200 5 8 0 1 0 8 1 pintype=io } P 3800 7600 3500 7600 1 0 0 { T 3600 7650 5 8 1 1 0 0 1 pinnumber=51 T 3600 7550 5 8 0 1 0 2 1 pinseq=51 T 3450 7600 9 8 1 1 0 6 1 pinlabel=PA0 (AD0) T 3450 7600 5 8 0 1 0 8 1 pintype=io } P 3800 7800 3500 7800 1 0 0 { T 3600 7850 5 8 1 1 0 0 1 pinnumber=50 T 3600 7750 5 8 0 1 0 2 1 pinseq=50 T 3450 7800 9 8 1 1 0 6 1 pinlabel=PA1 (AD1) T 3450 7800 5 8 0 1 0 8 1 pintype=io } P 3800 8000 3500 8000 1 0 0 { T 3600 8050 5 8 1 1 0 0 1 pinnumber=49 T 3600 7950 5 8 0 1 0 2 1 pinseq=49 T 3450 8000 9 8 1 1 0 6 1 pinlabel=PA2 (AD2) T 3450 8000 5 8 0 1 0 8 1 pintype=io } P 3800 8200 3500 8200 1 0 0 { T 3600 8250 5 8 1 1 0 0 1 pinnumber=48 T 3600 8150 5 8 0 1 0 2 1 pinseq=48 T 3450 8200 9 8 1 1 0 6 1 pinlabel=PA3 (AD3) T 3450 8200 5 8 0 1 0 8 1 pintype=io } P 3800 8400 3500 8400 1 0 0 { T 3600 8450 5 8 1 1 0 0 1 pinnumber=47 T 3600 8350 5 8 0 1 0 2 1 pinseq=47 T 3450 8400 9 8 1 1 0 6 1 pinlabel=PA4 (AD4) T 3450 8400 5 8 0 1 0 8 1 pintype=io } P 3800 8600 3500 8600 1 0 0 { T 3600 8650 5 8 1 1 0 0 1 pinnumber=46 T 3600 8550 5 8 0 1 0 2 1 pinseq=46 T 3450 8600 9 8 1 1 0 6 1 pinlabel=PA5 (AD5) T 3450 8600 5 8 0 1 0 8 1 pintype=io } P 3800 8800 3500 8800 1 0 0 { T 3600 8850 5 8 1 1 0 0 1 pinnumber=45 T 3600 8750 5 8 0 1 0 2 1 pinseq=45 T 3450 8800 9 8 1 1 0 6 1 pinlabel=PA6 (AD6) T 3450 8800 5 8 0 1 0 8 1 pintype=io } P 3800 9000 3500 9000 1 0 0 { T 3600 9050 5 8 1 1 0 0 1 pinnumber=44 T 3600 8950 5 8 0 1 0 2 1 pinseq=44 T 3450 9000 9 8 1 1 0 6 1 pinlabel=PA7 (AD7) T 3450 9000 5 8 0 1 0 8 1 pintype=io }