MIPS I system running on Xilinx Spartan-3A FPGA Starter Kit: VHDL code for processor core very similar to MIPS I and for several peripherals, C firmware to run on this system

Stefan Schuermans Stefan Schuermans added padding of ethernet packets to 60 bytes data min ARP is working now 55a4ef9 @ 2012-03-21 21:43:38
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www some links to MIPS ISA documentation 2012-01-23 22:11:08
mips-isa.pdf MIPS ISA spec 2012-01-24 21:41:27