MIPS I system running on Xilinx Spartan-3A FPGA Starter Kit: VHDL code for processor core very similar to MIPS I and for several peripherals, C firmware to run on this system
Stefan Schuermans
fix unused signals
0c78368 @ 2012-02-05 13:21:27
| .. | ||
|---|---|---|
| clk.ucf | start of MIPS core: begin of decoder and ALU | 2012-01-23 22:06:18 |
| rst.ucf | start of MIPS core: begin of decoder and ALU | 2012-01-23 22:06:18 |