https://git.blinkenarea.org/mips_sys/tree/29639239be872151209f31ff1aa232949b9a7563 Recent commits to mips_sys (29639239be872151209f31ff1aa232949b9a7563) 2012-03-16T21:34:51+00:00 tag:gitlist.org,2012:commit/29639239be872151209f31ff1aa232949b9a7563 updated project files 2012-03-16T21:34:51+00:00 Stefan Schuermans stefan@schuermans.info <pre>&lt;/pre&gt; tag:gitlist.org,2012:commit/c377c925d39c75c4e36a14979f769367c4f29e18 enable optimization for size 2012-03-15T21:45:23+00:00 Stefan Schuermans stefan@schuermans.info <pre>&lt;/pre&gt; tag:gitlist.org,2012:commit/48bb6008875a78c1802f5b332e5f1a808e637bb5 fixed decoding of M[FT]{HI|LO} 2012-03-13T21:11:43+00:00 Stefan Schuermans stefan@schuermans.info <pre>&lt;/pre&gt; tag:gitlist.org,2012:commit/2ef1d95cf5b52936b651e95a370f0485bb60d998 made MAC configurable in ethernet peripheral 2012-03-11T20:48:30+00:00 Stefan Schuermans stefan@schuermans.info <pre>&lt;/pre&gt; tag:gitlist.org,2012:commit/b7a31d7b3ac8d92ec51d4233e4689e1d60263272 improve synchonous FIFO implementation (get rid of delays between reads) 2012-03-11T18:59:11+00:00 Stefan Schuermans stefan@schuermans.info <pre>&lt;/pre&gt; tag:gitlist.org,2012:commit/155819946877ad804b57ca5da8af4866dfa7c030 remove leftover comments 2012-03-11T18:44:23+00:00 Stefan Schuermans stefan@schuermans.info <pre>&lt;/pre&gt; tag:gitlist.org,2012:commit/7ea541c877463e1d810ebd434aa3e777e53f661a replaced ethernet RX clock domain crossing interface with dual clock FIFO 2012-03-10T17:43:57+00:00 Stefan Schuermans stefan@schuermans.info <pre>&lt;/pre&gt; tag:gitlist.org,2012:commit/f08af9fc9b59639677048e4f166c90f937ecffcf remove unneeded type definition 2012-03-10T11:16:40+00:00 Stefan Schuermans stefan@schuermans.info <pre>&lt;/pre&gt; tag:gitlist.org,2012:commit/13632e3fb8b84f9ba839a2d899d399a135b678b7 fixed uninitialized / not resetted frame done output of ethernet TX frame processing 2012-03-10T10:56:08+00:00 Stefan Schuermans stefan@schuermans.info <pre>&lt;/pre&gt; tag:gitlist.org,2012:commit/1f34390a6202ad42a373516466fd9bb13fda11e2 added dual clock FIFO implementation changed ethernet TX interface to use dual clock FIFO for clock domain crossing 2012-03-10T10:50:55+00:00 Stefan Schuermans stefan@schuermans.info <pre>&lt;/pre&gt;