mips_sys

Tree: 8072c84
8072c84c6c0d67aa0566d167ddea5fbf44944afb
Stefan Schuermans start of MIPS core: begin o...

Stefan Schuermans authored 12 years ago

 
1) LIBRARY ieee;
2) USE ieee.std_logic_1164.all;
3) USE ieee.numeric_std.all;
4) USE work.mips_types.all;
5) 
6) ENTITY e_mips_core IS
7)     PORT (
8)         rst:   IN  std_logic;
9)         clk:   IN  std_logic;
10)         o_res: OUT std_logic_vector(31 DOWNTO 0)
11)     );
12) END ENTITY e_mips_core;
13) 
14) ARCHITECTURE a_mips_core OF e_mips_core IS
15) 
16)     SIGNAL r_instr: std_logic_vector(31 DOWNTO 0);
17) 
18)     SIGNAL s_src_s:  std_logic_vector( 4 DOWNTO 0);
19)     SIGNAL s_src_t:  std_logic_vector( 4 DOWNTO 0);
20)     SIGNAL s_dest:   std_logic_vector( 4 DOWNTO 0);
21)     SIGNAL s_imm_a:  std_logic_vector( 4 DOWNTO 0);
22)     SIGNAL s_imm_16: std_logic_vector(15 DOWNTO 0);
23)     SIGNAL s_imm_26: std_logic_vector(25 DOWNTO 0);
24)     SIGNAL s_op:     t_op;
25)     SIGNAL s_link:   t_link;
26)     SIGNAL s_cmp:    t_cmp;
27)     SIGNAL s_alu:    t_alu;
28)     SIGNAL s_imm:    t_imm;
29) 
30)     SIGNAL s_op1: std_logic_vector(31 DOWNTO 0);
31)     SIGNAL s_op2: std_logic_vector(31 DOWNTO 0);
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Stefan Schuermans authored 12 years ago

 
32)     SIGNAL s_res: std_logic_vector(31 DOWNTO 0);
Stefan Schuermans start of MIPS core: begin o...

Stefan Schuermans authored 12 years ago

 
33) 
34)     COMPONENT e_mips_decoder IS
35)         PORT (
36)             i_instr:  IN  std_logic_vector(31 DOWNTO 0);
37)             o_src_s:  OUT std_logic_vector( 4 DOWNTO 0);
38)             o_src_t:  OUT std_logic_vector( 4 DOWNTO 0);
39)             o_dest:   OUT std_logic_vector( 4 DOWNTO 0);
40)             o_imm_a:  OUT std_logic_vector( 4 DOWNTO 0);
41)             o_imm_16: OUT std_logic_vector(15 DOWNTO 0);
42)             o_imm_26: OUT std_logic_vector(25 DOWNTO 0);
43)             o_op:     OUT t_op;
44)             o_link:   OUT t_link;
45)             o_cmp:    OUT t_cmp;
46)             o_alu:    OUT t_alu;
47)             o_imm:    OUT t_imm
48)         );
49)     END COMPONENT e_mips_decoder;
50)
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Stefan Schuermans authored 12 years ago

 
51)     COMPONENT e_mips_regs IS
52)         PORT (
53)             rst:         IN  std_logic;
54)             clk:         IN  std_logic;
55)             i_rd_a_no:   IN  std_logic_vector( 4 DOWNTO 0);
56)             o_rd_a_data: OUT std_logic_vector(31 DOWNTO 0);
57)             i_rd_b_no:   IN  std_logic_vector( 4 DOWNTO 0);
58)             o_rd_b_data: OUT std_logic_vector(31 DOWNTO 0);
59)             i_wr_no:     IN  std_logic_vector( 4 DOWNTO 0);
60)             i_wr_data:   IN  std_logic_vector(31 DOWNTO 0);
61)             i_wr_en:     IN  std_logic
62)         );
63)     END COMPONENT e_mips_regs;
64)
Stefan Schuermans start of MIPS core: begin o...

Stefan Schuermans authored 12 years ago

 
65)     COMPONENT e_mips_alu IS
66)         PORT (
67)             i_alu: IN  t_alu;
68)             i_op1: IN  std_logic_vector(31 DOWNTO 0);
69)             i_op2: IN  std_logic_vector(31 DOWNTO 0);
70)             o_res: OUT std_logic_vector(31 DOWNTO 0)
71)         );
72)     END COMPONENT e_mips_alu;
73) 
74) BEGIN
75) 
76)     decoder: e_mips_decoder
77)         PORT MAP (
78)             i_instr  => r_instr,
79)             o_src_s  => s_src_s,
80)             o_src_t  => s_src_t,
81)             o_dest   => s_dest,
82)             o_imm_a  => s_imm_a,
83)             o_imm_16 => s_imm_16,
84)             o_imm_26 => s_imm_26,
85)             o_op     => s_op,
86)             o_link   => s_link,
87)             o_cmp    => s_cmp,
88)             o_alu    => s_alu,
89)             o_imm    => s_imm
90)         );
91)
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Stefan Schuermans authored 12 years ago

 
92)     regs: e_mips_regs
93)         PORT MAP (
94)             rst         => rst,
95)             clk         => clk,
96)             i_rd_a_no   => s_src_s,
97)             o_rd_a_data => s_op1,
98)             i_rd_b_no   => s_src_t,
99)             o_rd_b_data => s_op2,
100)             i_wr_no     => s_dest,
101)             i_wr_data   => s_res,
102)             i_wr_en     => '1'
103)         );
Stefan Schuermans start of MIPS core: begin o...

Stefan Schuermans authored 12 years ago

 
104) 
105)     alu: e_mips_alu
106)         PORT MAP (
107)             i_alu => s_alu,
108)             i_op1 => s_op1,
109)             i_op2 => s_op2,
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110)             o_res => s_res
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Stefan Schuermans authored 12 years ago

 
111)         );
112) 
113)     p_dummy_fetch: PROCESS(rst, clk)
114)     BEGIN
115)         IF rst = '1' THEN
116)             r_instr <= X"00000000";
117)         ELSIF rising_edge(clk) THEN
118)             r_instr <= std_logic_vector(unsigned(r_instr) + to_unsigned(1, 32));
119)         END IF;
120)     END PROCESS p_dummy_fetch;
121)
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122)     o_res <= s_res;
123)