MIPS I system running on Xilinx Spartan-3A FPGA Starter Kit: VHDL code for processor core very similar to MIPS I and for several peripherals, C firmware to run on this system
Stefan Schuermans
implementation of ethernet and ARP (not completely working yet, hangs on received ARP request)
cc0f06d @ 2012-03-17 01:03:19
| .. | ||
|---|---|---|
| eth_pack.hex | implemented ethernet RX busmaster -> packet reception working | 2012-03-03 23:42:55 |
| eth_pack.nib | implemented ethernet RX busmaster -> packet reception working | 2012-03-03 23:42:55 |