MIPS I system running on Xilinx Spartan-3A FPGA Starter Kit: VHDL code for processor core very similar to MIPS I and for several peripherals, C firmware to run on this system
Stefan Schuermans
use ARP request packet as eth input
5325d28 @ 2012-03-19 23:37:00
| .. | ||
|---|---|---|
| eth_pack.hex | implemented ethernet RX busmaster -> packet reception working | 2012-03-03 23:42:55 |
| eth_pack.nib | implemented ethernet RX busmaster -> packet reception working | 2012-03-03 23:42:55 |