Recent commits to mips_sys (77114e63cc8fb1d2d64a437ee5bebc61b7121753) https://git.blinkenarea.org/index.php/mips_sys/tree/77114e63cc8fb1d2d64a437ee5bebc61b7121753 Recent commits feed provided by GitList. converted core to use req and grant signals to access data bus https://git.blinkenarea.org/index.php/mips_sys/commit/77114e63cc8fb1d2d64a437ee5bebc61b7121753 stefan@schuermans.info (Stefan Schuermans) Thu, 01 Mar 2012 21:23:47 +0000 77114e63cc8fb1d2d64a437ee5bebc61b7121753 keep read enable active during read https://git.blinkenarea.org/index.php/mips_sys/commit/1d0a24ccc53079418a318393e40398d23ac421fd stefan@schuermans.info (Stefan Schuermans) Thu, 01 Mar 2012 20:04:09 +0000 1d0a24ccc53079418a318393e40398d23ac421fd changed MIPS core to use read and write ack instead of stall input https://git.blinkenarea.org/index.php/mips_sys/commit/4059dff66b96d3920d70dcf569785f45ef4e8367 stefan@schuermans.info (Stefan Schuermans) Wed, 29 Feb 2012 21:28:37 +0000 4059dff66b96d3920d70dcf569785f45ef4e8367 shortcut to switch between HW and simulation config https://git.blinkenarea.org/index.php/mips_sys/commit/c559f2fe8b700ba22f5ae8a98e5d7bba818f209a stefan@schuermans.info (Stefan Schuermans) Wed, 29 Feb 2012 21:28:34 +0000 c559f2fe8b700ba22f5ae8a98e5d7bba818f209a add read_enable signal to data bus and some peripherals https://git.blinkenarea.org/index.php/mips_sys/commit/22b456946e289c89da296dcaceeb18de71761713 stefan@schuermans.info (Stefan Schuermans) Sun, 26 Feb 2012 21:20:53 +0000 22b456946e289c89da296dcaceeb18de71761713 fix reading (1 cycle latency) from ethernet peripheral https://git.blinkenarea.org/index.php/mips_sys/commit/318917987ee9e1b173da8adcb10b30513c38f925 stefan@schuermans.info (Stefan Schuermans) Sun, 26 Feb 2012 18:26:02 +0000 318917987ee9e1b173da8adcb10b30513c38f925 timing for ethernet clocks https://git.blinkenarea.org/index.php/mips_sys/commit/e8985095f2186f2da5f9efaf5b16ee465ecbf7ec stefan@schuermans.info (Stefan Schuermans) Tue, 21 Feb 2012 21:39:56 +0000 e8985095f2186f2da5f9efaf5b16ee465ecbf7ec removed bottleneck from data bus implementation, now meets timing even with keep_hierarchy https://git.blinkenarea.org/index.php/mips_sys/commit/65b262222298e6553b9748bee885da8c15da7365 stefan@schuermans.info (Stefan Schuermans) Tue, 21 Feb 2012 20:40:30 +0000 65b262222298e6553b9748bee885da8c15da7365 begin of ethernet RX implementation, so far only test interface to core, does not meet timing https://git.blinkenarea.org/index.php/mips_sys/commit/47f05ce618f31c873c88ab640434eacbf4513740 stefan@schuermans.info (Stefan Schuermans) Mon, 20 Feb 2012 21:16:03 +0000 47f05ce618f31c873c88ab640434eacbf4513740 add UART error check to FW https://git.blinkenarea.org/index.php/mips_sys/commit/3586a3195a45f87601f6e1d335cb8c9fb84b1dc9 stefan@schuermans.info (Stefan Schuermans) Mon, 20 Feb 2012 16:03:28 +0000 3586a3195a45f87601f6e1d335cb8c9fb84b1dc9