Recent commits to mips_sys (155819946877ad804b57ca5da8af4866dfa7c030) https://git.blinkenarea.org/index.php/mips_sys/tree/155819946877ad804b57ca5da8af4866dfa7c030 Recent commits feed provided by GitList. remove leftover comments https://git.blinkenarea.org/index.php/mips_sys/commit/155819946877ad804b57ca5da8af4866dfa7c030 stefan@schuermans.info (Stefan Schuermans) Sun, 11 Mar 2012 18:44:23 +0000 155819946877ad804b57ca5da8af4866dfa7c030 replaced ethernet RX clock domain crossing interface with dual clock FIFO https://git.blinkenarea.org/index.php/mips_sys/commit/7ea541c877463e1d810ebd434aa3e777e53f661a stefan@schuermans.info (Stefan Schuermans) Sat, 10 Mar 2012 17:43:57 +0000 7ea541c877463e1d810ebd434aa3e777e53f661a remove unneeded type definition https://git.blinkenarea.org/index.php/mips_sys/commit/f08af9fc9b59639677048e4f166c90f937ecffcf stefan@schuermans.info (Stefan Schuermans) Sat, 10 Mar 2012 11:16:40 +0000 f08af9fc9b59639677048e4f166c90f937ecffcf fixed uninitialized / not resetted frame done output of ethernet TX frame processing https://git.blinkenarea.org/index.php/mips_sys/commit/13632e3fb8b84f9ba839a2d899d399a135b678b7 stefan@schuermans.info (Stefan Schuermans) Sat, 10 Mar 2012 10:56:08 +0000 13632e3fb8b84f9ba839a2d899d399a135b678b7 added dual clock FIFO implementation changed ethernet TX interface to use dual clock FIFO for clock domain crossing https://git.blinkenarea.org/index.php/mips_sys/commit/1f34390a6202ad42a373516466fd9bb13fda11e2 stefan@schuermans.info (Stefan Schuermans) Sat, 10 Mar 2012 10:50:55 +0000 1f34390a6202ad42a373516466fd9bb13fda11e2 send ethernet packet on center button press https://git.blinkenarea.org/index.php/mips_sys/commit/e5514ed21097063b2aee4d7a421e19118e4d59b0 stefan@schuermans.info (Stefan Schuermans) Wed, 07 Mar 2012 21:52:08 +0000 e5514ed21097063b2aee4d7a421e19118e4d59b0 ethernet TX function takes const pointer https://git.blinkenarea.org/index.php/mips_sys/commit/ee604bb9bf19f0780562dccfff9d84f3d2035e17 stefan@schuermans.info (Stefan Schuermans) Wed, 07 Mar 2012 21:19:40 +0000 ee604bb9bf19f0780562dccfff9d84f3d2035e17 adapt ethernet TX clock timing constraint to transmission of data on falling edge https://git.blinkenarea.org/index.php/mips_sys/commit/de380fe29a5aed425f72210d28504be5a5cff963 stefan@schuermans.info (Stefan Schuermans) Wed, 07 Mar 2012 21:18:54 +0000 de380fe29a5aed425f72210d28504be5a5cff963 fix CRC generation during ethernet transmission trigger CRC generator only once per byte get CRC value _after_ last byte https://git.blinkenarea.org/index.php/mips_sys/commit/af62be09eb8ebe4defdd72f4595a375d6453d85c stefan@schuermans.info (Stefan Schuermans) Wed, 07 Mar 2012 21:15:53 +0000 af62be09eb8ebe4defdd72f4595a375d6453d85c transmit data on falling edge of ethernet TX clock https://git.blinkenarea.org/index.php/mips_sys/commit/e31652feb71d8bfca42eaee64745c9e16db06946 stefan@schuermans.info (Stefan Schuermans) Wed, 07 Mar 2012 21:15:19 +0000 e31652feb71d8bfca42eaee64745c9e16db06946