mips_sys

infrastructure to change SW without re-synthesizing
Parent 6b14095
Stefan Schuermans

Stefan Schuermans commited on 2012-03-25 02:16:26
Showing 6 changed files, with 141 additions and 1 deletions.

memory_maps/.gitignore
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+mips_sys_bd.bmm
memory_maps/check.sh
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+#! /bin/bash
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+
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+cd "$(dirname "$0")"
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+
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+DATA2MEM="/opt/Xilinx/13.4/ISE_DS/ISE/bin/lin64/data2mem"
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+
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+cd ..
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+
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+ERR=0
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+
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+"$DATA2MEM" \
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+  -bm memory_maps/mips_sys_bd.bmm \
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+  -bt e_system.bit \
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+  -d >e_system.bit.txt
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+
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+"$DATA2MEM" \
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+  -bm memory_maps/mips_sys_bd.bmm \
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+  -bt e_system.bit \
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+  -bd fw/rom.bin tag rom \
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+  -o b changed_rom.bit
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+
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+"$DATA2MEM" \
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+  -bm memory_maps/mips_sys_bd.bmm \
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+  -bt changed_rom.bit \
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+  -d >changed_rom.bit.txt
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+
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+N=$(diff e_system.bit.txt changed_rom.bit.txt | wc -l)
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+if (($N > 12))
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+then
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+  echo "ROM failed" >&2
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+  ERR=1
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+fi
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+
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+"$DATA2MEM" \
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+  -bm memory_maps/mips_sys_bd.bmm \
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+  -bt e_system.bit \
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+  -bd fw/ram.bin tag ram \
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+  -o b changed_ram.bit
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+
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+"$DATA2MEM" \
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+  -bm memory_maps/mips_sys_bd.bmm \
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+  -bt changed_ram.bit \
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+  -d >changed_ram.bit.txt
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+
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+N=$(diff e_system.bit.txt changed_ram.bit.txt | wc -l)
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+if (($N > 12))
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+then
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+  echo "RAM failed" >&2
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+  ERR=1
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+fi
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+
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+exit $ERR
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+
memory_maps/mips_sys.bmm
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+ADDRESS_SPACE rom RAMB16 [0x00000000:0x00003FFF]
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+    BUS_BLOCK
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+        instr/Mrom__varindex00002 RAMB16 [3:0] [0:4095];
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+        instr/Mrom__varindex00001 RAMB16 [7:4] [0:4095];
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+        instr/Mrom__varindex00004 RAMB16 [11:8] [0:4095];
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+        instr/Mrom__varindex00003 RAMB16 [15:12] [0:4095];
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+        instr/Mrom__varindex00006 RAMB16 [19:16] [0:4095];
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+        instr/Mrom__varindex00005 RAMB16 [23:20] [0:4095];
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+        instr/Mrom__varindex00008 RAMB16 [27:24] [0:4095];
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+        instr/Mrom__varindex00007 RAMB16 [31:28] [0:4095];
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+    END_BUS_BLOCK;
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+END_ADDRESS_SPACE;
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+
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+ADDRESS_SPACE ram RAMB16 [0x00000000:0x00001FFF]
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+    BUS_BLOCK
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+        data_0/Mram_s_buf RAMB16 [7:0] [0:2047];
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+        data_1/Mram_s_buf RAMB16 [15:8] [0:2047];
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+        data_2/Mram_s_buf RAMB16 [23:16] [0:2047];
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+        data_3/Mram_s_buf RAMB16 [31:24] [0:2047];
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+    END_BUS_BLOCK;
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+END_ADDRESS_SPACE;
memory_maps/mips_sys_bd.bmm
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+// BMM LOC annotation file.
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+//
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+// Release 13.4 - (null) O.87xd, build 2.7 Nov 11, 2011
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+// Copyright (c) 1995-2012 Xilinx, Inc.  All rights reserved.
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+
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+
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+///////////////////////////////////////////////////////////////////////////////
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+//
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+// Address space 'ram' 0x00000000:0x00001FFF (8 KBytes).
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+//
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+///////////////////////////////////////////////////////////////////////////////
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+
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+ADDRESS_SPACE ram RAMB16 [0x00000000:0x00001FFF]
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+    BUS_BLOCK
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+        data_0/Mram_s_buf RAMB16 [7:0] [0:2047] PLACED = X1Y5;
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+        data_1/Mram_s_buf RAMB16 [15:8] [0:2047] PLACED = X1Y4;
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+        data_2/Mram_s_buf RAMB16 [23:16] [0:2047] PLACED = X1Y6;
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+        data_3/Mram_s_buf RAMB16 [31:24] [0:2047] PLACED = X1Y7;
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+    END_BUS_BLOCK;
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+END_ADDRESS_SPACE;
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+
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+
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+///////////////////////////////////////////////////////////////////////////////
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+//
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+// Address space 'rom' 0x00000000:0x00003FFF (16 KBytes).
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+//
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+///////////////////////////////////////////////////////////////////////////////
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+
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+ADDRESS_SPACE rom RAMB16 [0x00000000:0x00003FFF]
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+    BUS_BLOCK
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+        instr/Mrom__varindex00002 RAMB16 [3:0] [0:4095] PLACED = X0Y3;
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+        instr/Mrom__varindex00001 RAMB16 [7:4] [0:4095] PLACED = X0Y2;
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+        instr/Mrom__varindex00004 RAMB16 [11:8] [0:4095] PLACED = X0Y9;
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+        instr/Mrom__varindex00003 RAMB16 [15:12] [0:4095] PLACED = X0Y6;
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+        instr/Mrom__varindex00006 RAMB16 [19:16] [0:4095] PLACED = X0Y8;
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+        instr/Mrom__varindex00005 RAMB16 [23:20] [0:4095] PLACED = X0Y7;
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+        instr/Mrom__varindex00008 RAMB16 [27:24] [0:4095] PLACED = X0Y5;
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+        instr/Mrom__varindex00007 RAMB16 [31:28] [0:4095] PLACED = X0Y4;
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+    END_BUS_BLOCK;
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+END_ADDRESS_SPACE;
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+
memory_maps/update.sh
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+#! /bin/bash
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+
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+cd "$(dirname "$0")"
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+
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+DATA2MEM="/opt/Xilinx/13.4/ISE_DS/ISE/bin/lin64/data2mem"
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+
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+cd ..
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+
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+"$DATA2MEM" \
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+  -bm memory_maps/mips_sys_bd.bmm \
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+  -bt e_system.bit \
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+  -bd fw/rom.bin tag rom \
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+  -o b e_system_tmp.bit
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+
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+"$DATA2MEM" \
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+  -bm memory_maps/mips_sys_bd.bmm \
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+  -bt e_system_tmp.bit \
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+  -bd fw/ram.bin tag ram \
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+  -o b e_system.bit
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+
mips_sys.xise
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@@ -171,6 +171,9 @@
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       <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="5"/>
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       <association xil_pn:name="Implementation" xil_pn:seqID="5"/>
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     </file>
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+    <file xil_pn:name="memory_maps/mips_sys.bmm" xil_pn:type="FILE_BMM">
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+      <association xil_pn:name="Implementation" xil_pn:seqID="0"/>
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+    </file>
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   </files>
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   <properties>
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     <property xil_pn:name="Language" xil_pn:value="VHDL" xil_pn:valueState="default"/>
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     <property xil_pn:name="Last Applied Goal" xil_pn:value="Balanced" xil_pn:valueState="default"/>
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     <property xil_pn:name="Last Applied Strategy" xil_pn:value="Xilinx Default (unlocked)" xil_pn:valueState="default"/>
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-    <property xil_pn:name="Last Selected UCF File" xil_pn:value="/home/stefan/spartan3/mips_sys/constraints/lcd.ucf" xil_pn:valueState="non-default"/>
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+    <property xil_pn:name="Last Selected UCF File" xil_pn:value="/home/stefan/spartan3/mips_sys/constraints/clk.ucf" xil_pn:valueState="non-default"/>
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     <property xil_pn:name="Last Unlock Status" xil_pn:value="false" xil_pn:valueState="default"/>
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     <property xil_pn:name="Launch SDK after Export" xil_pn:value="true" xil_pn:valueState="default"/>
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     <property xil_pn:name="Library for Verilog Sources" xil_pn:value="" xil_pn:valueState="default"/>
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@@ -489,6 +492,7 @@
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     <binding xil_pn:location="/e_system" xil_pn:name="constraints/switches.ucf"/>
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     <binding xil_pn:location="/e_system" xil_pn:name="constraints/uart.ucf"/>
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     <binding xil_pn:location="/e_system" xil_pn:name="constraints/eth.ucf"/>
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+    <binding xil_pn:location="/e_system" xil_pn:name="memory_maps/mips_sys.bmm"/>
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   </bindings>
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   <libraries/>
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